1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly to an apparatus and a method of driving a lamp of a liquid crystal display device
2. Description of the Related art
Generally, liquid crystal display devices (“LCD”) are being widely used because they are light, thin, and consumes low power. For example, liquid crystal display devices are used in office automation equipment, and audio/video equipment. A liquid crystal display (LCD) controls the light transmittance of liquid crystal using an electric field in accordance with a video signal applied to a plurality of control switches which are arranged in a matrix, to thereby display a picture. To this end, the LCD includes a liquid crystal display panel having a pixel matrix, and a driving circuit for driving the liquid crystal display panel. The driving circuit drives the pixel matrix such that picture information can be displayed on the display panel.
Such a LCD is not a self-luminous display device, because it requires an additional light source like a backlight unit. A cold cathode fluorescent tube (hereinafter, referred to as “CCFT”) is used as the light source in the backlight unit. The CCFL is a light source tube using a cold emission phenomenon. In the cold emission phenomenon, an electron emission is generated by a strong electric field applied to a cathode surface. The CCFL generates low heat, is very bright, and has a long life span and full color capability. The CCFL can be used in a light guide type light source, a direct light type light source, and a reflector type light source. An appropriate type of light source tube is selected according to the requirement of the liquid crystal display device. The CCFL uses an inverter circuit for obtaining a high voltage power from a DC power source of low voltage.
FIG. 1 a diagram representing a lamp driving apparatus of a liquid crystal display device according to the related art. Referring to FIG. 1, the related lamp driving apparatus includes a plurality of lamps 6 which generate light; a plurality of inverter parts 4 to drive the lamps 6 by supplying an AC waveform of high voltage to the lamps 6; and an inverter controller 2 to control the inverter parts 4. The lamps 6 receive a lamp output voltage from the inverter parts 4 and irradiate a visible light onto a liquid crystal display panel (not shown). Each of the lamps 6 is composed of a glass tube. The glass tube is filled with an inert gas, and a phosphorus is spread over the inner wall of the glass tube. A high AC voltage is applied by the inverter 4 to a high voltage electrode of each of the lamps 6. Electrons are emitted in each of the lamps 6 and collide with the inert gas, thereby increasing the number of electrons according to a geometric progression. The abundance of electrons causes an electrical current to flow in the glass tube. Thus, the inert gas, such as Ar and Ne, is excited by the electrons to generate energy. The generated energy excites mercury to emit an ultraviolet ray. The ultraviolet ray collides with the luminous phosphorus, which is spread over the inner wall of the glass tube, to emit a visible ray.
FIG. 2 is a diagram representing the related art inverter part shown in FIG. 1. Referring to FIG. 2, each of the inverter parts 4 is driven by an enable signal ENA from the inverter controller 2 (shown in FIG. 1), drives the lamps 6 using a clock signal CLK and a reference voltage Vref from the inverter controller 2, and transmits to the inverter controller 2 a state signal ACK generated when a malfunction occurs in the lamp 6. Accordingly, if the state signal ACK is supplied to the inverter controller 2, the inverter controller 2 stops driving the inverter part 4 corresponding to the lamp 6 where the malfunction occurs. Each of the inverter parts 4 includes an inverter 8, a switch device 16 and transformer 18. The transformer 18 supplies a high voltage to the lamps 6. The switch device part 16 supplies an externally provided DC power source VDD to the transformer 18 in accordance with the output value of the inverter 8. The inverter 8 drives the switch device part 16.
The transformer 18 includes a primary winding T1 of which both ends are connected to the switch device part 16, a first winding of secondary winding T2 to which a high voltage AC waveform having a first phase is induced by a winding ratio with the primary winding T1, and a second winding of secondary winding T3 to which a high voltage AC waveform having a second phase is induced by the winding ratio with the primary winding T1. One side of the first winding of secondary winding T2 is connected to one side of the lamp 6, and the other side is connected to a feedback circuit 14. One side of the second winding of secondary winding T3 is connected to the other side of the lamp 6, and the other side is connected to the feedback circuit 14. An AC waveform supplied from the switch device 16 is converted into the high voltage AC waveform induced in the first winding of secondary winding T2 of the transformer 18. The AC waveform supplied from the switch device 16 to the primary winding T1 is converted into the high voltage AC waveform induced in the second winding of secondary winding T3 of the transformer 18. The current supplied by the high voltage AC waveform induced in the first winding of secondary winding T2 and the second winding of secondary winding T3 of the transformer 18 is supplied to each of the lamps 6. Accordingly, the lamps 6 are discharged by the current supplied by the high voltage AC waveforms to generate the light.
The inverter 8 uses the clock signal CLK and the reference voltage Vref supplied from the inverter controller 2 to generate drive signals PDR1, NDR1, PDR2, and NDR2 to drive the switch device part 16. The inverter 8 includes a drive signal generator 10 to drive the switch device part 16, a feedback circuit 14 connected to the transformer 18 to detect the output voltage of the transformer 18, and a switch controller 12 to generate a control signal SCS for controlling the switch device part 16 based on a feedback signal FB from the feedback circuit 14 to the switch controller 12.
The feedback circuit 14 generates the feedback signal FB corresponding to the high voltage AC waveforms FB1 and FB2 from the first winding of secondary winding T2 and the second winding of secondary winding T3 of the transformer 18. The feedback circuit 14 supplies the generated feedback signal FB to the switch controller 12.
FIG. 3 is a diagram representing a method of calculating a pulse width of a dimming signal in accordance with the related art. Referring to FIGS. 2 and 3, the switch controller 12 generates a switching control signal SCS using a triangular wave current LCT which is induced to the primary winding T1 of the transformer 18 and a dimming voltage Vdim of DC for controlling the brightness of the lamp 6, in accordance with the feedback signal FB from the feedback signal 14. The amplitude of the dimming voltage Vdim changes in accordance with the feedback signal FB. For example, the dimming voltage Vdim decreases to the lower part of the triangular wave current LCT which is induced to the primary winding T1 of the transformer 18 when the brightness of the light generated at the lamp 6 is low, and the dimming voltage Vdim increases to the upper part of the triangular wave current LCT when the brightness of the light generated at the lamp 6 is high. The generated switching control signal SCS is supplied to the drive signal generator 10.
FIG. 4 is a diagram representing drive signals supplied to the related art switch device part shown in FIG. 1. The drive signal generator 10 generates the drive signals PDR1, NDR1, PDR2, and NDR2 shown in FIG. 4 in accordance with the reference voltage Vref supplied from the inverter controller 2 and the switching control signal SCS supplied from the switch controller 12. The drive signal generator 10 supplies the drive signals PDR1, NDR1, PDR2, and NDR2 to the switch device part 16.
The switch device part 16 is driven in accordance with the drive signals PDR1, NDR1, PDR2, and PDR2 supplied from the drive signal generator 10 to supply the externally provided DC power VDD to the primary winding T1 of the transformer 18. The switch device part 16 includes a first switch part 16a for supplying a positive (+) DC voltage to the primary winding T1 of the transformer 18 and a second switch part 16b for supplying a negative (−) DC voltage to the primary winding T1 of the transformer 18. The first switch part 16a supplies the positive (+) DC voltage VDD to both terminals “a” and “b” of the primary winding T1 of the transformer 18. The first switch part 16a includes a first switch device Q1 installed between a first terminal of the primary winding T1 of the transformer 18 and the DC voltage source VDD to be driven by the first drive signal PDR1 supplied from the drive signal generator 10; and a second switch device Q2 installed between a ground voltage source GND and the first terminal of the primary winding T1 of the transformer 18 to be driven by the second drive signal NDR1 supplied from the drive signal generator 10. The first switch device Q1 is a P-type transistor (MOSFET or BJT) and the second switch device Q2 is an N-type transistor (MOSFET or BJT). If the first and second drive signals PDR1 and NDR1 shown in FIG. 4 are supplied, the first and second switching devices Q1, Q2 supply the DC voltage VDD to the first terminal of the primary winding T1 of the transformer 18 when the first and second drive signals PDR1, NDR1 are low.
The second switch part 16b supplies the negative (−) DC voltage VDD to both terminals “a” and “b” of the primary winding T1 of the transformer 18. The second switch part 16b includes a third switch device Q3 installed between a second terminal of the primary winding T1 of the transformer 18 and the DC voltage source VDD to be driven by the third drive signal PDR2 supplied from the drive signal generator 10; and a fourth switch device Q4 installed between a ground voltage source GND and the second terminal of the primary winding T1 of the transformer 18 to be driven by the fourth drive signal NDR2 supplied from the drive signal generator 10. The third switch device Q3 is a P-type transistor (MOSFET or BJT) and the second switch device Q4 is an N-type transistor (MOSFET or BJT). When the third and fourth drive signals PDR2 and NDR2 shown in FIG. 4 are supplied, the third and fourth switching devices Q3 and Q4 supply the DC voltage VDD to the second terminal of the primary winding T1 of the transformer 18 when the third and fourth drive signals PDR2 and NDR2 are low.
FIG. 5 is a diagram representing a voltage supplied to a primary winding of a transformer by the drive signals shown in FIG. 4. As shown in part of (a) of FIG. 5, a first DC voltage VoutH is supplied to one side of the primary winding T1 of the transformer 18. However, the DC voltage VoutH is not supplied to the first terminal of the primary winding T1 of the transformer 18 when the first and second drive signals PDR1 and NDR1 are high. As shown in part (b) of FIG. 5, a second DC voltage VoutL is supplied to the second terminal of the primary winding T1 of the transformer 18. However, the second DC voltage VoutL is not supplied to second terminal of the primary winding T1 of the transformer 18 when the third and fourth drive signals PDR2 and NDR2 are high. A tank voltage VL shown in part (c) of FIG. 5 is generated across terminals “a” and “b” of the primary winding T1 of the transformer 18 by the first and second switch parts 16a and 16b. As shown in FIG. 3, the tank voltage causes a triangular wave current LCT to be induced in the primary winding T1 of the transformer 18.
FIG. 6 is a diagram representing dimming signals generated by the related art inverter controller shown in FIG. 1. Referring to FIGS. 1 and 6, the inverter controller 2 receives a polarity control signal POL for controlling the polarity of a dimming signal and an inverter selection signal SEL from a system (not shown). The inverter controller 2 supplies to the inverter part 4 dimming signals L0 to L11 for controlling the brightness of light generated by the lamps 6, an enable signal ENA for driving the inverter part 4, and a clock signal CLK and the reference voltage Vref for generating the drive signals PDR1, NDR1, PDR2, and NDR2. When a state signal ACK indicating a malfunction in one of the lamps 6 is received from one of the inverters parts 4, the inverter controller 2 stops driving the inverter part 4 corresponding to the lamp 6 where a malfunction occurs. Further, the inverter controller 2 supplies to the inverter part 4 the dimming signals L0 to L11 generated by an external vertical synchronization signal Vsync having a period T2, as shown in FIG. 6. The inverter 4 controls the brightness of the light generated by the lamps 6. As shown in FIG. 3, the width of each of the dimming signals L0 to L11 is controlled by a signal having a period T1 which is formed by the triangular wave current LCT induced between the terminals “a” and “b” of the primary winding T1 of the transformer 18 and the dimming voltage Vdim of DC.
However, the related art lamp driving apparatus of the liquid crystal display device increases the cost of the liquid crystal display device because the lamps 6 are driven by the plurality of inverter parts 4.